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AMBE-3000F™ Vocoder Chip Users Manual
Version 3.4, April, 2014
(Subject to Change) Page 3
DVSI CONFIDENTIAL PROPRIETARY
Hardware Information
Digital Voice Systems, Inc.
The Speech Compression Specialists
2 Hardware Information
The AMBE-3000F™ Vocoder Chip uses Texas Instruments TMS320F2811 core. The TMS320F2811 DSP Design uses High-
Performance Static CMOS Technology with a low-power Core (1.8-V @135 MHz), and 3.3-V I/O. This generation of TI
DSPs, are highly integrated, high-performance solutions for demanding control applications. For more details on handling,
electrical characteristics, packaging, or timing constraints please refer to the TMS320F2811 manual found at
http://focus.ti.com/docs/prod/fold
ers/print/tms320f2811.html
2.1 Special Handling and Moisture Sensitivity
To avoid damage from the accumulation of a static charge, industry standard electrostatic discharge precautions and procedures
must be employed during handling and mounting.
The length of time the AMBE-3000F™ can be safely exposed to the ambient environment prior to high temperature reflow
soldering follows the JEDEC industry standard classification for Moisture Sensitivity Level.
LQFP package
MSL Level-2-260C-1 Year
BGA Package
MSL Level-3-260C-168 hours
NOTE: DVSI recommends the AMBE-3000F™ in the BGA package be handled within proper MSL Level 3
guidelines to avoid damage from moisture absorption that could result in yield and reliability degradation. The
Moisture Sensitivity Level requirements allow the AMBE-3000F™ to be safely exposed to the ambient environment
of <30ºC/60% RH, for only 168 hours. Since this is a relatively short period of time, all manufacturers should
routinely follow industry standard MSL Level 3 bake-out procedures prior to assembly with these components.
- AMBE-3000F™ Vocoder Chip 1
- DVSI Confidential Proprietary 1
- (Subject to Change) Page v 5
- (Subject to Change) Page x 10
- 1 Product Introduction 11
- 1.3 Typical Applications 12
- 2 Hardware Information 13
- 2.2 Package Details 14
- (Subject to Change) Page 5 15
- 2.3 Pin Assignment Layouts 16
- A B C D E F G H J K L M N P 17
- (Subject to Change) Page 8 18
- (Subject to Change) Page 9 19
- 2.5 Pin Out Table 20
- PARITY_ENABLE 79 22
- Input Enable parity bit 22
- Table 1 Pinout List 26
- 2.7.1 External Clock Source 29
- 2.7.2 Crystal Oscillator 29
- Table 7 Voltage Supply Pins 32
- 3.6 Reset Behavior 33
- Figure 11 TX_RDY after Reset 34
- Figure 12 Output Levels 34
- 3.8 Power-Down Sequencing: 35
- 3.9 Low Power Modes 35
- 3.9.1 Run State 36
- 3.9.2 Idle State 36
- 3.9.3 Standby State 36
- 3.9.4 Halt State 36
- 3.9.5 Power Modes 37
- 4.2 Interface Selection 40
- 4.4 Vocoder State 41
- Figure 18 Typical Echo Path 43
- Table 11 Companding Control 44
- 5 I/O Management 45
- Table 13 ECMODE_IN Flags 46
- Table 14 ECMODE_OUT FLAGS 46
- Table 15 DCMODE_IN Flags 47
- Table 16 DCMODE_OUT Flags 47
- 5.2 Codec mode 49
- “0 to Transition”“1” 51
- “Packet_ _Zone”Uncertainty 51
- “aperiodic packets” 52
- 5.3 Packet Mode 53
- Figure 29 Packet Mode 55
- 5.5 SPI Interface 56
- 5.6 UART Interface 57
- 5.7 McBSP Interface 58
- 5.8 Parallel Interface 61
- Table 26 PPT Timing 62
- Figure 36 Vocoder Front End 64
- Diagram 66
- 6.1 Overview 68
- 6.2 Codec Mode Operation 68
- 6.3 Packet Mode Operation 68
- 6.4 Packet Interfaces 69
- 6.5 Packet Format 69
- 6.5.3 TYPE (1 byte) 70
- 6.5.4 Packet Fields 70
- Table 59 PKT_CODECSTOP Field 78
- Table 61 PKT_CHANFMT Field 79
- samples dcmode 80
- Table 64 PKT_SPCHFMT Field 80
- 0x54 0x46 0x00 81
- Table 71 PKT_READY Field 82
- Table 72 PKT_HALT Field 82
- Table 73 PKT_RESET Field 82
- 6.7.1 Speech Packet Fields 89
- Table 100 CMODE Field Format 90
- Table 103 TONE Field Format 90
- 6.11 Example Packets 94
- 7 Appendices 98
- Table 115 Rate Index Numbers 100
- 8 Support 103
- Digital Voice Systems, Inc 104
- 10 IC Chip Software Errata 107
- Release 007 09/10/2009 108
- Release 014 08/31/2012 108
- 11 History of Revisions 109
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