Digital Voice Systems AMBE-3000 Specifications Page 58
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AMBE-3000F™ Vocoder Chip Users Manual
Version 3.4, April, 2014
I/
O Management
11
5,200 0 1 0
230,400 0 1 1
460,800 1 0 0
Table 20 UART Baud Rates
5.6.1 UART_TX Pin State
When designing a system using the UART interface on the AMBE-3000™ Vocoder Chip it is necessary that the UART_TX
pin (pin 111 QFP – pin C7 BGA) be held high at boot. This will ensure the AMBE-3000™ Vocoder Chip will start in the
proper configuration. If the UART is not used in your design it can be left unconnected (there is an internal pull up resistor).
5.7 McBSP Interface
The Multichannel Buffered Serial Port (McBSP) is a synchronous serial communication port. The beginning of a word of data
is indicated by a frame signal. The receive frame signal and receive clock are inputs and must be generated by the device
interfacing to the AMBE-3000F™ Vocoder Chip. The McBSP interface can be used as either the codec interface or the packet
interface. When the McBSP interface is used as the codec interface for speech data it is not available for packet data. When
operating as the packet interface the McBSP interface is used for packet data.
Pin Pin Name Direction Description
TQFP BGA
18 G2 McBSP_RxD Input Serial Receive Data
19 G1 McBSP_TxD Output Serial Transmit Data
21 H2 McBSP_CLKR Input Serial Receive Clock
22 H4 McBSP_FSX I/O Serial Transmit Frame
23 J1 McBSP_CLKX I/O Serial Transmit Clock
24 J2 McBSP_FSR Input Serial Receive Frame
Table 21 McBSP Interface Pins
5.7.1 McBSP Selected for Codec Interface
If the McBSP is selected as the codec interface and companding is selected there are 8 data bits (In Figure 32 N=8). If
companding is not used then there are 16 data bits (In Figure 32 N=16). The bits are order from N-1
to 0, where bit N-1 is the
MSB and bit 0 is the LSB. McBSP_RxD is sampled on the rising edge of McBSP_CLKR and McBSP_TxD is sampled on the
falling edge of McBSP_CLKR. The signals McBSP_CLKX, McBSP_CLKR, McBSP_FSX and McBSP_FSR are all inputs
generated by the codec. McBSP_CLKX and McBSP_CLKR should be connected together. McBSP_FSX and McBSP_FSR
should also be connected together.
Note: The higher the frequency of the MCBSP clock the more power consumption is reduced when low-power mode is
enabled.
(Subject to Change) Page 48
DVSI CONFIDENTIAL PROPRIETARY
- AMBE-3000F™ Vocoder Chip 1
- DVSI Confidential Proprietary 1
- (Subject to Change) Page v 5
- (Subject to Change) Page x 10
- 1 Product Introduction 11
- 1.3 Typical Applications 12
- 2 Hardware Information 13
- 2.2 Package Details 14
- (Subject to Change) Page 5 15
- 2.3 Pin Assignment Layouts 16
- A B C D E F G H J K L M N P 17
- (Subject to Change) Page 8 18
- (Subject to Change) Page 9 19
- 2.5 Pin Out Table 20
- PARITY_ENABLE 79 22
- Input Enable parity bit 22
- Table 1 Pinout List 26
- 2.7.1 External Clock Source 29
- 2.7.2 Crystal Oscillator 29
- Table 7 Voltage Supply Pins 32
- 3.6 Reset Behavior 33
- Figure 11 TX_RDY after Reset 34
- Figure 12 Output Levels 34
- 3.8 Power-Down Sequencing: 35
- 3.9 Low Power Modes 35
- 3.9.1 Run State 36
- 3.9.2 Idle State 36
- 3.9.3 Standby State 36
- 3.9.4 Halt State 36
- 3.9.5 Power Modes 37
- 4.2 Interface Selection 40
- 4.4 Vocoder State 41
- Figure 18 Typical Echo Path 43
- Table 11 Companding Control 44
- 5 I/O Management 45
- Table 13 ECMODE_IN Flags 46
- Table 14 ECMODE_OUT FLAGS 46
- Table 15 DCMODE_IN Flags 47
- Table 16 DCMODE_OUT Flags 47
- 5.2 Codec mode 49
- “0 to Transition”“1” 51
- “Packet_ _Zone”Uncertainty 51
- “aperiodic packets” 52
- 5.3 Packet Mode 53
- Figure 29 Packet Mode 55
- 5.5 SPI Interface 56
- 5.6 UART Interface 57
- 5.7 McBSP Interface 58
- 5.8 Parallel Interface 61
- Table 26 PPT Timing 62
- Figure 36 Vocoder Front End 64
- Diagram 66
- 6.1 Overview 68
- 6.2 Codec Mode Operation 68
- 6.3 Packet Mode Operation 68
- 6.4 Packet Interfaces 69
- 6.5 Packet Format 69
- 6.5.3 TYPE (1 byte) 70
- 6.5.4 Packet Fields 70
- Table 59 PKT_CODECSTOP Field 78
- Table 61 PKT_CHANFMT Field 79
- samples dcmode 80
- Table 64 PKT_SPCHFMT Field 80
- 0x54 0x46 0x00 81
- Table 71 PKT_READY Field 82
- Table 72 PKT_HALT Field 82
- Table 73 PKT_RESET Field 82
- 6.7.1 Speech Packet Fields 89
- Table 100 CMODE Field Format 90
- Table 103 TONE Field Format 90
- 6.11 Example Packets 94
- 7 Appendices 98
- Table 115 Rate Index Numbers 100
- 8 Support 103
- Digital Voice Systems, Inc 104
- 10 IC Chip Software Errata 107
- Release 007 09/10/2009 108
- Release 014 08/31/2012 108
- 11 History of Revisions 109
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